1. Field of the Invention
The present invention relates to the provision of electrostatic discharge (ESD) protection for flat panel displays incorporating thin film transistors (TFTs) in the pixel drive circuitry.
2. Description of the Related Art
Recently, there has been growing commercial utilization of flat panel displays both as a replacement for the conventional CRT display and as a display for applications in which a CRT display is impractical, such as in portable computers and in viewers for video cameras. There are a variety of flat panel display technologies, including liquid crystal displays (LCDs), plasma displays and field emission displays. Of these, LCD technology has found the greatest level of acceptance in view of the comparative simplicity of the technology and the comparative ease of production. Flat panel displays are conventionally manufactured by forming electronic circuitry on an optically transparent substrate (e.g., glass) using photolithographic processing techniques (deposition, mask definition and etching) to form semiconductor thin film transistors (TFTs) and the other circuitry used for addressing and driving the pixels of the display. Generally, an electrically excitable medium is provided in close proximity to the driving electronics, and signals provided to the electrically excitable medium by the driving electronics cause the electrically excitable medium to produce a modulated optical signal. In the case of plasma displays, the electrically excitable medium itself generates the modulated optical signal. In other cases, such as twisted nematic liquid crystal displays (TN-LCDs), a light source is provided adjacent the electronically excitable medium (i.e., the liquid crystal) and the electronically excitable medium is used as a graduated light valve to modulate the light passing through the liquid crystal.
Typically, flat panel displays are configured as a matrix array of addressable pixel locations, with corresponding drive circuitry provided to drive each pixel independently. In an exemplary configuration of a TN-LCD, one thin film transistor (TFT) is provided adjacent each pixel for locally exciting the liquid crystal material which serves as the electrically excitable medium of the TN-LCD. The TFT is coupled to a pixel electrode, a column signal line and a row signal line. Signals provided to the TFT over the column signal line and the row signal line determine whether the TFT causes the pixel electrode to be at a high potential which excites the liquid crystal, or at a low potential which does not excite the liquid crystal. FIG. 1 illustrates a small portion of the drive circuitry formed on the backplane of a TN-LCD. The backplane may be formed, for example, on a glass substrate 10 and the illustrated circuitry can be used to excite the liquid crystal material. Row select signals are provided at row contact pads 12 and through row bus lines 16; column drive signals are provided at column contact pads 14 and through column bus lines 18. Thin film transistors (TFTs) 20 adjacent the intersections between the row and column lines act as switching elements for coupling drive signals to individual pixel locations. When the TFTs are turned on, charge can flow to the pixel electrodes 22 to charge the capacitor formed by the pixel electrode 22 and a ground electrode formed on the front substrate of the display (not shown). Liquid crystal fills the gap of this capacitor, so that the charge flowing through the thin film transistor generates an electrical field across the adjacent liquid crystal. The thin film transistors 20 are typically formed from amorphous silicon on the surface of the glass substrate 10 or on one or more thin film layers deposited on the glass substrate 10.
A common failure mode for the circuitry illustrated in FIG. 1 involves the destruction of an insulation layer, such as the silicon nitride gate insulator often used in TFTs, as a result of electrostatic discharge (ESD). ESD might generate a large transient potential between a column line and a row line of a TN-LCD, in turn causing the breakdown of the silicon nitride of the TFT at the intersection between the column line and the row line. After the silicon nitride undergoes dielectric breakdown, the silicon nitride is no longer an effective insulator and the affected TFT acts as a short-circuit between the corresponding column line and row line. This failure mode has been recognized, for example, in U.S. Pat. No. 5,019,002 to Holmberg. The Holmberg patent states that this electrostatic discharge mode can be avoided by providing a guard ring around the active elements of the display, with the guard ring coupled to the row and column lines of the display. This guard ring structure is schematically illustrated in FIG. 1. Guard ring 24 is typically formed from a low resistivity conductor, which might be a metal such as aluminum, and the guard ring is coupled to the row and column lines 16, 18 adjacent the contact pads 12, 14 by protection circuit elements 26. According to the Holmberg patent, the protection circuit elements 26 might be a thin film transistor without a gate, that is, each of the protection circuit elements 26 might consist of two amorphous silicon diodes in a back to back configuration except that the diodes are coupled by an amorphous silicon resistor.
There are substantial drawbacks to the structure described in the Holmberg patent. To provide effective ESD protection, guard ring 24 must remain connected to the backplane's drive circuitry throughout the assembly and test of the display. Under some circumstances, it is desirable to leave the guard ring connected to the drive circuitry after completion of the display so that the ESD protection is provided for the completed display. Whether for testing purposes or in the course of the normal operation of the display, it is necessary to provide signals to the thin film transistors to drive the pixels of the display. As such, the protection circuit elements 26 could drain away driving current from a point immediately adjacent the contact pads for the display. Accordingly, it is necessary to ensure that the protection circuit elements have a substantial resistance, at least to relatively low frequency drive signals. To this end, a high resistance, intrinsic amorphous silicon (a-Si) resistor is typically incorporated in the protection circuit element 26 used to form the ESD protection structure of the Holmberg patent. The resistance of such an intrinsic a-Si resistor is very high (&gt;G.OMEGA.) and causes the protection circuit element 26 to provide only a weak coupling between the guard ring 24 and the row and column lines 16, 18, even for the large transients associated with ESD. As such, the ESD protection circuit illustrated in the Holmberg patent provides inadequate protection from ESD damage for the TN-LCD.
An improvement to the Holmberg patent's ESD protection circuit is described in U.S. Pat. No. 5,220,443 to Noguchi. In the Noguchi patent's ESD protection circuit, illustrated in FIG. 2, a pair of thin film field effect transistors 40, 42 (TFTs) form an ESD protection circuit element 26 that may be used in the circuitry illustrated in FIG. 1. The gate of transistor 40 is connected to both the drain of transistor 40 and the source of transistor 42, and the gate of transistor 42 is connected to both the drain of transistor 42 and the source of transistor 40. As such, the source of transistor 40 is connected to the drain of transistor 42 and the drain of transistor 40 is connected to the source of transistor 42. The common node consisting of the drain of transistor 40 and the source of transistor 42 forms an input terminal for the FIG. 2 protection circuit element. The common node between the drain of transistor 42 and the source of transistor 40 forms an output terminal for the FIG. 2 circuit. Significantly improved ESD protection is obtained when the FIG. 2 protection circuit is used in the FIG. 1 guard ring structure, as compared to the performance of the Holmberg patent's ESD protection circuit. The FIG. 2 protection circuit provides an acceptably large low frequency resistance so that the FIG. 1 guard ring structure can be used either during testing of the display or in the ordinary use of the display.
The FIG. 2 structure has certain undesirable characteristics. Two transistors must be provided to achieve an acceptable protection circuit element, but two transistors take up an undesirable amount of space. It would therefore be desirable to provide a circuit protection element which is more compact than the two transistor element described in the Noguchi patent. More importantly, the protection circuit element described in Noguchi requires that contacts be formed between the gate and the drain of the transistors. This connection requires the formation of a contact via and an interconnect that is not required in the processing of the thin film drive transistors. Accordingly, the protection circuit element illustrated in Noguchi undesirably requires processing steps unnecessary to the formation of the rest of the display. Accordingly, use of the ESD protection element illustrated in FIG. 2 increases the cost of flat panel displays and decreases yields slightly. It would therefore be desirable to form a protection circuit element that is more compatible with the processing normally used in the formation of the display and, most preferably, does not require any processing steps not necessary to the formation of thin film drive transistors.